To drive down cost of test, today’s advanced semiconductors demand equally advanced testing technologies. Outdated, singulated testing methods no longer meet subcon’s and IDM’s growing needs. And, while the demand for more powerful, smarter and smaller semiconductors has driven down prices for chips themselves, packaging and test remain costly.
Testing increasingly complex chips can account for 50% of total product cost. Remarkably, that number is projected to rise to over 75% within the next few years.
Strip testing can reduce cost of test by as much as 40% or more. Strip testing allows devices to be production final tested in a massively parallel configuration. Higher parallelism, either for final packaged devices or for wafer level products (WLP) has been proven to drastically reduce cost of test (and make those “must have” consumer appliances more affordable in the process).
Whether in lead-frame or laminate array, strip testing equipment from MCT provides:
- Increased tester utilization of 10%-15%
- Higher first pass yields of 2%-4%
- Far less jams
- The ability to handle very small parts (3mm x 3mm and below)